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When using Flatstream, the communication direction is very important. For transmitting data to a module (output direction), Tx bytes are used. For receiving data from a module (input direction), Rx bytes are used.
Registers "OutputSequence" and "InputSequence" are used to control and ensure that communication is taking place properly, i.e. the transmitter issues the directive that the data should be accepted and the receiver acknowledges that a sequence has been transferred successfully.
当使用Flatstream时，通信方向是非常重要的。对于向一个模块的传输数据（输出方向），使用Tx字节。对于从一个模块的接收数据（输入方向），使用Rx字节。
寄存器 "OutputSequence "和 "InputSequence "用于控制和确保通信的正常进行，即发送方发出指令，数据应被接受，接收方确认一个序列已被成功传输。