The basic algorithm for transmitting and receiving data remains the same. With the Forward function, up to 7 unacknowledged sequences can be transmitted. Sequences can be transmitted without having to wait for the previous message to be acknowledged. Since the delay between writing and response is eliminated, a considerable amount of additional data can be transferred in the same time window.

发送和接收数据的基本算法保持不变。使用转发功能，最多可以传输7个未确认的序列。序列可以在不必等待前一个消息被确认的情况下被传送。由于消除了写入和响应之间的延迟，在同一时间窗口内可以传输相当多的额外数据。

Algorithm for transmitting

传输算法

Cyclic status query:

- The module monitors OutputSequenceCounter.

循环状态查询：

- 该模块监测OutputSequenceCounter。

0) Cyclic checks:

- The CPU must check OutputSyncAck.

→ If OutputSyncAck = 0: Reset OutputSyncBit and resynchronize the channel.

- The CPU must check whether OutputMTU is enabled.

→ If OutputSequenceCounter > OutputSequenceAck + 7, then it is not enabled because the last sequence has not yet been acknowledged.

0) 循环检查：

- CPU必须检查OutputSyncAck。

→ 如果OutputSyncAck = 0：重置OutputSyncBit并重新同步通道。

- CPU必须检查OutputMTU是否被启用。

→ 如果OutputSequenceCounter > OutputSequenceAck + 7，那么它不会启用，因为最后一个序列还没有被确认。

1) Preparation (create transmit array):

- The CPU must split up the message into valid segments and create the necessary control bytes.

- The CPU must add the segments and control bytes to the transmit array.

1) 准备（创建发送数组）：

- CPU必须将信息分割成有效的段，并创建必要的控制字节。

- CPU必须将这些段和控制字节添加到发送数组中。

2) Transmit:

- The CPU must transfer the current part of the transmit array to OutputMTU.

- The CPU must increase OutputSequenceCounter for the sequence to be accepted by the module.

- The CPU is then permitted to transmit in the next bus cycle if the MTU has been enabled.

2) 传输：

- CPU必须将发送数组的当前部分转移到OutputMTU。

- CPU必须增加OutputSequenceCounter，模块才能接受该序列。

- -如果MTU已被启用，则允许CPU在下一个总线周期中进行传输。

The module responds since OutputSequenceCounter > OutputSequenceAck:

- The module accepts data from the internal receive buffer and appends it to the end of the internal receive array.

- The module is acknowledged and the currently received value of OutputSequenceCounter is transferred to OutputSequenceAck.

- The module queries the status cyclically again.

由于OutputSequenceCounter>OutputSequenceAck，模块作出响应：

模块接受来自内部接收缓冲区的数据，并将其附加到内部接收数组的末端。

模块被确认，当前收到的OutputSequenceCounter的值传输到OutputSequenceAck。

模块再次循环地查询状态。

3) Completion (acknowledgment):

- The CPU must check OutputSequenceAck cyclically.

→ A sequence is only considered to have been transferred successfully if it has been acknowledged via OutputSequenceAck. In order to detect potential transfer errors in the last sequence as well, it is important to make sure that the algorithm is run through long enough.

3) 完成（确认）：

- CPU必须循环地检查OutputSequenceAck。

→ 只有当一个序列通过OutputSequenceAck被确认时，才认为该序列已成功传输。为了检测最后一个序列中潜在的传输错误，确保算法运行足够长的时间是很重要的。

Note:

注意：

To monitor communication times exactly, the task cycles that have passed since the last increase of OutputSequenceCounter should be counted. In this way, the number of previous bus cycles necessary for the transfer can be measured. If the monitoring counter exceeds a predefined threshold, then the sequence can be considered lost (the relationship of bus to task cycle can be influenced by the user so that the threshold value must be determined individually).

为了准确监测通信时间，应该计算自上次增加OutputSequenceCounter以来所经过的任务周期。通过这种方式，可以测量传输所需的先前总线周期的数量。如果监测计数器超过了预定义的阈值，那么可以认为该序列已经丢失。

（总线与任务周期的关系可能会受到用户的影响，因此阈值必须单独确定。）

Algorithm for receiving

接收的算法

0) Cyclic status query:

- The CPU must monitor InputSequenceCounter.

0) 循环状态查询：

- CPU必须监测InputSequenceCounter。

Cyclic checks:

- The module checks InputSyncAck.

- The module checks if InputMTU for enabling.

→ Enabling criteria: InputSequenceCounter > InputSequenceAck + Forward

循环检查：

- 模块检查InputSyncAck。

- 模块检查InputMTU是否启用。

→ 启用标准：InputSequenceCounter > InputSequenceAck + Forward/span>

Preparation:

- The module forms the control bytes / segments and creates the transmit array.

准备：

- 模块形成控制字节/段并创建发送数组。

Action:

- The module transfers the current part of the transmit array to the receive buffer.

- The module increases InputSequenceCounter.

- The module waits for a new bus cycle after time from ForwardDelay has expired.

- The module repeats the action if InputMTU is enabled.

执行：

- 模块将发送数组的当前部分转移到接收缓冲区。

- 模块增加InputSequenceCounter。

- 在ForwardDelay时间结束后，模块等待一个新的总线周期。

- 如果InputMTU被启用，模块会重复这个动作。

1) Receiving (InputSequenceCounter > InputSequenceAck):

- The CPU must apply data from InputMTU and append it to the end of the receive array.

- The CPU must match InputSequenceAck to InputSequenceCounter of the sequence currently being processed.

1) 接收（InputSequenceCounter>InputSequenceAck）：

- CPU必须应用InputMTU的数据，并将其追加到接收数组的末端。

- CPU必须将InputSequenceAck与当前正在处理的序列的InputSequenceCounter匹配。

Completion:

- The module monitors InputSequenceAck.

→ A sequence is only considered to have been transferred successfully if it has been acknowledged via InputSequenceAck.

完成：

- 该模块监控InputSequenceAck。

→ 只有当一个序列通过InputSequenceAck被确认时，才认为该序列已成功传输。

Details/Background

细节/背景

•Illegal SequenceCounter size (counter offset)

SequenceCounter大小（计数器偏移量）非法

Error situation: MTU not enabled

If the difference between SequenceCounter and SequenceAck during transmission is larger than permitted, a transfer error occurs. In this case, all unacknowledged sequences must be repeated with the old SequenceCounter value.

错误情况：未启用MTU

如果在传输过程中SequenceCounter和SequenceAck之间的差异大于允许的范围，就会发生传输错误。在这种情况下，必须用旧的SequenceCounter值重复所有未确认的序列。

•Checking an acknowledgment

检查确认

After an acknowledgment has been received, a check must verify whether the acknowledged sequence has been transmitted and had not yet been unacknowledged. If a sequence is acknowledged multiple times, a severe error occurs. The channel must be closed and resynchronized (same behavior as when not using Forward).

在收到确认后，必须检查确认的序列是否已经被传送，并且尚未被确认。如果一个序列被多次确认，就会发生一个严重的错误。通道必须被关闭并重新同步（与不使用Forward时的行为相同）。

Information:

注意:

In exceptional cases, the module can increment OutputSequenceAck by more than 1 when using Forward.

An error does not occur in this case. The CPU is permitted to consider all sequences up to the one being acknowledged as having been transferred successfully.

在特殊情况下，当使用Forward时，模块可以将OutputSequenceAck增加1以上。

在这种情况下不会出现错误。允许CPU考虑所有序列，直到被确认为已成功传输的序列为止。

•Transmit and receive arrays

发送和接收数组

The Forward function has no effect on the structure of the transmit and receive arrays. They are created and must be evaluated in the same way.

Forward功能对发送和接收数组的结构没有影响。它们被创建并必须以同样的方式被评估。

用转发进行传输和接收 - Transmitting and receiving with Forward